Workshop Programme


IWES 2021
Thursday 9 December 2021
Congress Hall
10:20 Welcome coffee and Registration
(available in the hall foyer)
Workshop opening
10:50   Toni Mancini, Nicola Mazzocca
Welcome
11:00 Special session
Research and technologies for embedded systems in the digital transition
In collaboration with the ESSM-CINI Lab

Chairman: Nicola Mazzocca, director of ESSM-CINI Lab

Panelists:
  Nicoletta Amodio
Responsable Ricerca e Innovazione, Confindustria Programmi Europei

Eugenio Fedeli
Responsabile Ricerca e Sviluppo, Rete Ferroviaria Italiana

Leonardo Impagliazzo
Chief Director, Digital, Innovation & Chief Lumada Business Officer, Hitachi Rail Group
Industrial session 1
Company presentations and business challenges
11:50   Giacomo Gentile, Fabio Federici and Orlando Ferrante
Collins Aerospace
12:00   Danilo Pau
STMicroelectronics
12:10   Paolo Gai
Huawei Pisa Research Center 
12:20   Ernesto Pistilli, Alessandro Amadoro, Ivan Velasco
ELT Elettronica Group
12:30   Gabriele Angelozzi, Walter Antonaci, Alessandro Nicolò De Giovanni, Giovanni Nuzzo
MBDA Italia, Software Directorate and Software Department
12:40   Ermanno Battista
Fervento s.r.l.
12:50 ESSM-CINI Annual Meeting
13:30 Lunch
(served in the hall foyer)
Presentations of academic groups
14:30   Luigi Palopoli
University of Trento
Robotics activities
14:35   Enrico Fraccaroli, Luca Geretti, Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Davide Quaglia and Tiziano Villa
Cyber-Physical & IoT System Design (CISD) Consortium, University of Verona
14:40   Giovanni Agosta
HEAP Lab, Polytechnic of Milan
There and Back Again: Compilation and Decompilation
14:45   Enrico Macii, Massimo Poncino, Andrea Calimera, Daniele Jahier Pagliari, Edoardo Patti, Sara Vinco, Santa Di Cataldo, Lorenzo Bottaccioli and Roberto Giorgio Rizzo
EDA Group, Polytechnic of Turin
14:50   Vahid Eftekhari Moghadam, Marco Meloni and Paolo Prinetto
Polytechnic of Turin
Control-Flow Integrity for Real-Time Operating Systems
14:55   Andrea Ceccarelli and Andrea Bondavalli
Resilient Computing Lab, University of Florence
15:00   Luigi Pomante
Embedded Systems Design, University of L'Aquila
15:05   Toni Mancini, Igor Melatti and Enrico Tronci
MCLab, Model Checking Lab, Sapienza University of Rome
15:10   Vincenzo Maisto, Stefano Mercogliano, Franca Rocco Di Torrepadula, Alessandra Somma, Francesco Vitale, Nicola Mazzocca, Alessandro Cilardo, Valentina Casola and Alessandra De Benedictis
DIETI, University of Naples Federico II
15:15   Daniela De Venuto, Michele Ruta, Giovanni Mezzina and Eugenio Di Sciascio
Embedded Systems & Smart Manufacturing CINI Lab, Polytechnic of Bari
15:20   Paolo Meloni
EOLAB Microelectronics / Microelectronics & Bioengineering Lab, University of Cagliari
15:25   Lucia Lo Bello, Gaetano Patti and Luca Leonardi
University of Catania
Design, analysis, simulation, and experimental evaluation of real-time communication systems for automotive and industrial applications
15:30 Coffee break
(served in the hall foyer, will be running until last break)
15:45 IWES Business Meeting Industrial session 2
Presentations to students/post-docs by selected companies
Alpha Hall (adjacent to Congress Hall)
    15:45   Fabio Federici, Orlando Ferrante, Luca Manica
Collins Aerospace
16:25 Short break      
Technical session 1 16:05   Ernesto Pistilli, Alessandro Amadoro, Ivan Velasco
ELT Elettronica Group
16:35   Roberto Giorgi
Extending Performance and Reliability via Thread-Level Dataflow Management
     
16:50   Edoardo Cittadini, Giorgiomaria Cicero, Mauro Marinoni, Alessandro Biondi and Giorgio Buttazzo
Supporting AI-powered cyber-physical systems on heterogeneous platforms
16:25   Paolo Bizzarri, Massimiliano Curti, Eugenio Romeo
Teoresi Group
17:05   Matteo Zini, Giorgiomaria Cicero, Daniel Casini and Alessandro Biondi
Profiling and controlling I/O-related memory contention in COTS heterogeneous platforms
16:45   Open discussions
17:20 Short break
17:30 Industrial session 3
Company technical presentations
17:30   Danilo Pau
STMicroelectronics
Methodology and tools to achieve neural networks fast deployment on STM32 Nucleo Image classifier case study
17:45   Marcello Coppola
STMicroelectronics
Embedded systems and connectivity for smart agriculture and consumer devices
18:00   Fabio Federici, Loris Dal Lago, Alejandro Garcia Gener, Gonzalo Salinas Hernando, Philip J. Harris and Matthew P. Corbett
Collins Aerospace
Custom SoCs for avionics: methodologies, tools, and the role of Open Hardware
18:15   Marco Carloni, Chih-Kuang Lin, Phillip Harris and Luca Manica
Collins Aerospace
Is Avionics ready for “fly-by-wireless”?
18:30   Cristian Cucchiella, Francesco Chirico and Ferruccio Foti
ELT Elettronica Group
Developing embedded software with Virtual Platform before HW availability
18:45 End of the day
20:30 Social dinner
Friday 10 December 2021
Congress Hall
Technical session 2
9:30   Igor Melatti, Toni Mancini and Enrico Tronci
A Two-Layer Near-Optimal Strategy for Substation Constraint Management via Home Batteries
9:45   Sanjoy Baruah and Alberto Marchetti-Spaccamela
Feasibility analysis of conditional DAG tasks
10:00   Cataldo Luciano Saragaglia, Giovanni Mezzina, Mario Barbareschi, Giuseppe Narracci, Diana Serra and Daniela De Venuto
Design and Implementation of a Novel Architecture for the Safety Level Improvement in Automatic Train Operations
10:15   Dario Bruneo and Fabrizio De Vita
Bringing Intelligence to Cyber Physical Systems via Compression and Quantization Techniques for Anomaly Detection in Industry 4.0
10:30   Enrico Macii, Massimo Poncino, Andrea Calimera, Daniele Jahier Pagliari, Roberto Giorgio Rizzo, Valentino Peluso and Luca Mocerino
HW/SW Inference-time Optimizations for Reliable Embedded Convolutional Neural Networks
10:45   Alessandro Cimatti
Modern Formal Methods for the Design and Verification of Complex Systems
11:00 Coffee break
(served in the hall foyer)
Technical session 3
11:30   Filippo Minnella
Eco-computing: Latch-based Razor Flip-Flops for digital circuits
11:45   Giovanni Mezzina, Mario Barbareschi, Giuseppe Narracci, Cataldo Luciano Saragaglia, Diana Serra and Daniela De Venuto
Compact on-board PCB for vital control in autonomous train operations
12:00   Livia Lestingi, Marcello M. Bersani and Matteo Rossi
Model-driven development of formally verified human-robot interactions
12:15   Niccolò Borgioli, Matteo Zini, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi and Giorgio Carlo Buttazzo
Real-time I/O virtualization with memory contention control
12:30   Giorgia Subbicini, Mihai Teodor Lazarescu and Luciano Lavagno
Drift rejection front-end for long range capacitive sensors for human indoor localization
12:45   Nicolò Maunero and Gianluca Roascio
PROLEPSIS: Binary analysis and instrumentation of IoT software for control-flow integrity
13:00 Lunch
(served in the hall foyer)
Technical session 4
14:00   Samuele Cerini and Nicolò Maunero
Empirical evaluation of the resilience of novel non-algebraic AES S-Boxes to power side-channel attacks
14:15   Gianluca Brilli, Giacomo Valente, Alessandro Capotondi, Tania Di Mascio, Paolo Valente, Paolo Burgio and Andrea Marongiu
A cycle-accurate methodology to improve PREM-like memory bandwidth underutilization on FPGA-based HeSoCs
14:30   Roberto Bagnara, Abramo Bagnara and Patricia Hill
The role of static program analysis in functional safety
14:45   Matteo Fornero
An open-source hardware platform for securing applications, data, and infrastructures
15:00   Mattia Bottaro and Tullio Vardanega
Evaluating a multicore Mixed-Criticality System implementation against a temporal isolation kernel
15:15   Eugenio Romeo, Michele Settembrino, Giuseppe Sorrentino and Paolo Bizzarri
Autogeneration of code for middleware: benefits of model based design approach
15:30 Coffee break
(served in the hall foyer, will be running until last break)
Technical session 5
16:00   William Fornaciari and Davide Zoni
Power monitoring at the edge, is this opening a new door to side-channel attacks?
16:15   Manuele Rusci, Francesco Conti and Luca Benini
Towards Adaptive and Robust Tiny Machine Learning on Multi-Core Embedded RISC-V MCUs
16:30   Francesco Terrosi, Andrea Bondavalli and Andrea Ceccarelli
Failure modes and failures mitigation in GPGPUs: a reference model and its application
16:45   Laura Carnevali, Jacopo Parri, Samuele Sampietro, Francesco Santoni, Leonardo Scommegna, Federico Tammaro and Enrico Vicario
Automated generation and efficient quantitative analysis of the timed failure logic of component-based systems
17:00   Antonio Di Tecco, Pierfrancesco Foglia and Cosimo Antonio Prete
The strategic requirements of Application Services for new generation cars
17:15 Short break
17:25 Technical session 6
17:25   Giacomo Valente, Luigi Pomante, Tania Di Mascio and Federica Caruso
Enabling the exploration of the design space of monitoring systems: a new system-level approach
17:40   Gianluca D'Amico, Federico Nesti, Mauro Marinoni, Giorgio Buttazzo, Gianluigi Lauro and Salvatore Sabina
Simulation Framework for Enhanced Train Localization
17:55   Gabriele Angelozzi, Walter Antonaci, Alessandro Nicolò De Giovanni, Giovanni Nuzzo
Automatic test in CI/CD practice for embedded SW & FINX-RTOS product line for cyber resilience
18:10   Gianluca Bellocchi, Alessandro Capotondi and Andrea Marongiu
An open-source overlay for reconfigurable, accelerator-rich embedded systems
18:25 End of the workshop